SEH has a long history of SOI
production. Our SOI facility in Nagano was established
in 1988, and a new facility was built in 1997 to provide
adequate capacity to support semiconductor customers and
the developing micro-technology industry through at
least 2010. SEH has the world's largest capacity for
production of thick bonded SOI wafers, and we currently
supply more than 50% of the SOI wafers used for
semiconductor, MEMS, and MOEMS applications.
SEH's bonding and polishing process is similar to that
being used by several other SOI manufacturers, but SEH
has designed and developed it's own fabrication
equipment that can produce the highest quality wafers
for even the most demanding applications. SEH thick
bonded SOI wafers feature a 0.8 mm edge terrace width
that increases the chip yield on a wafer by up to 5% for
a 5mm x 5 mm device.
A large inventory of finished SOI products is always
available for customers who have an immediate need for
research and development material, but our real strength
lies in our ability to custom design SOI wafers for any
customers needs. SEH's expertise as a manufacturer of
low defect, annealed, or high resistivity crystal means
that we can produce SOI wafers built with crystal that
is also custom designed for the customer's application.
Optional ion implanted buried layers and the capability
to manufacture multiple active layer structures make SEH
the obvious choice for anyone looking for the latest
technology and highest quality SOI wafers.
SOI Product Brochure
SOI for MEMS applications
THIN SOI WAFER
Although SEH's thick bonding and
polishing process produces wafers that are suitable for
many semiconductor and MEMS applications, the limits of
the polishing technology created a need for another
process that could produce even thinner layers with even
tighter layer thickness uniformity. SEH also offers a
thin SOI Unibond® wafer manufactured with the SmartCut®
process, which is licensed from Soitec.
In the thin bonding process, the active and handle
wafers are bonded as in the thick bonding process, but
the active wafer includes a hydrogen implanted layer.
After bonding, the SOI wafer is annealed at moderate
temperatures after which the bulk of the active layer
separates from the bonded portion at the limit of the
hydrogen implant. (See Figure 1.) Minimal additional
processing is required to produce the final SOI wafer.
The SOI wafers produced by this process have very thin
active layers with exceptional layer thickness
uniformity. Thickness of 1000 nm and below are possible
with a uniformity of <±5%. These wafers are of the
highest quality with HF and Secco defect concentrations
that are suitable for the most demanding semiconductor
SEH's Unibond® process is now available for 200 mm and
300 mm wafers. Our new facility in Yokonodaira, Japan
has adequate capacity to meet the needs of the
semiconductor industry for the foreseeable future.
SOI Product B-rochure
SOI for MEMS applications