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   HIGH RESISTIVITY CA CRYSTAL FOR RF SOC APPLICATIONS


 

The integration of RF circuits into CMOS devices favors a shift to a very high silicon substrate resistivity. RF circuitry requires linear, analog devices with low noise and precision passive components (e.g., resistors, capacitors and inductors). Very high substrate resistivity decreases capacitively-coupled cross-talk between digital, analog and RF components, improving noise isolation. High- res silicon also improves the quality factor of spiral inductors by decreasing eddy current losses.

Float Zone crystal has typically been the only silicon option for applications requiring a resistivity greater than 1,000 ohm.cm, but FZ crystal is not currently readily available at 200/300mm. SEH has now developed and patented several techniques to manufacture CZ crystal with a resitivity of greater than 1,000 ohm.cm, and these wafers are available in production quantities today. (U.S. patent 6,544,656B1)

The main issue in High Res CZ is the management of Oi. High levels of Oi lead to thermal donor generation which creates unstable resistivity in the temperature range 350°c to 500°c common in back-end processes.

Oi must be reduced by special prescription thermal cycles (ref. U.S. patent #6,544,656) or the Oi level must be kept low by MCZ pulling processes



  


LOW OI MCZ


 

The CZ ingot growing process uses a fused quartz crucible to contain the silicon melt as the crystal is pulled from the melt over a period of up to 36 hours. Although structurally stable, this quartz crucible slowly devitrifies and dissolves during the course of the crystal's growth, liberating oxygen into the silicon melt and resulting in the oxygen concentration that characterizes CZ silicon. Control of crucible rotations and the environment within the crystal growing furnace has allowed engineers to minimize the oxygen concentration of CZ grown crystal but, until the advent of the magnetic CZ (MCZ) process, there have been very practical limits on the extent of such controls.

In the MCZ process, a super conducting magnet sits alongside of the crystal growing furnace and generates a magnetic field that inhibits the turbulent thermal convection that conveys oxygen through the silicon melt. Crystal growing engineers can now use this magnetic field to significantly limit the incorporation of oxygen in the crystal and also to produce more uniform crystal by stabilizing the temperature at the melt-crystal interface. Essentially, the magnetic field increases the viscosity of the silicon melt.

Low Oi levels reduce the amount of oxygen related thermal donors which can degrade the resistivity of silicon. For specific applications in which the presence of the heavy precipitation associated with the High Res FOP is not desirable, low Oi MCZ silicon may be a good choice.

For most applications, low Oi high res MCZ wafers are proven to be superior to the high Oi + precipitation technique. MCZ wafers with Oi levels <6.4 ppma ASTM '83 can provide performance very similar to FZ wafers

8 ppma SEH
        ↓
6.4 ppma A'80